Allegro MicroSystems has introduced the A81415, described as the first power management IC (PMIC) certified to automotive safety integrity level (ASIL) D to incorporate a wheel-speed sensor interface, targeting brake-by-wire corner modules in software-defined vehicles. The single-chip design eliminates up to nine external components and saves up to US$4 per vehicle in semiconductor bill-of-materials costs.

The A81415 integrates an on-chip wheel-speed sensor interface (WSSI) decoding 2-level, pulse width modulation (PWM) and 3-level AK protocols without external analogue circuitry, with decoded data shared over a serial peripheral interface (SPI) to reduce latency in the braking safety loop. The device also incorporates a buck-boost pre-regulator, five low-dropout (LDO) regulators and a single-inductor architecture requiring no external switches or diodes, freeing more than 50% of printed circuit board space.

Corner modules migrating from 12V to 48V architectures can pair the A81415 with Allegro MicroSystems’ APM81815 pre-regulator and 48V gate drivers to form a fail-operational chipset, giving Tier 1 suppliers a scalable path to 48V without redesigning existing braking architectures. The device carries ASIL-D and AEC-Q100 qualification, with dual watchdogs and built-in fault handling covering safety requirements without external protection circuitry.

In a statement, Peter Wells, Business Line Director, High Performance Power at Allegro MicroSystems, said:

“Intelligent chassis systems demand that sensing and power electronics at the wheel act as one. Allegro combined our wheel-speed sensing leadership and high-reliability power management expertise into our new PMIC to give our customers a simpler, safer and highly scalable foundation for modern vehicle brake-by-wire.”

Source: Allegro MicroSystems